1. Field of the Invention
The invention generally relates to a display system for producing an image and more specifically to a display system for providing a sequentially produced composite image.
2. Description of Related Art
A continuing objective in the field of electronics is the miniaturization of electronic devices. Most electronic devices include an electronic display. As a result, the miniaturization of electronic displays is critical to the production of a wide variety of compact electronic devices.
The purpose of an electronic display is to provide the eye with a visual image of certain information. This image may be provided by constructing an image plane composed of an array of picture elements (or pixels) which are independently controlled as to the color and intensity of the light emanating from each pixel. The electronic display is generally distinguished by the characteristic that an electronic signal is transmitted to each pixel to control the light characteristics which determine the pattern of light from the pixel array which forms the image.
Two examples of electronic displays are the cathode ray tube (CRT) and the active-matrix liquid crystal display (AMLCD). There are other electronic displays, but none are so well developed as the CRT and AMLCD which are used extensively in computer monitors, televisions, and electronic instrument panels. The CRT is an emissive display in which light is created through an electron beam exciting a phosphor which in turn emits light visible to the eye. Electric fields are used to scan the electron beam in a raster fashion over the array of pixels formed by the phosphors on the face plate of the electron tube. The intensity of the electron beam is varied in an analog (continuous) fashion as the beam is swept across the image plane, thus creating the pattern of light intensity which forms the visible image. In a color CRT, three electron beams are simultaneously scanned to independently excite three different color phosphors respectively which are grouped into a triad at each pixel location.
In contrast to the emissive type displays such as the CRT, an AMLCD display utilizes a lamp to uniformly illuminate the image plane which is formed by a thin layer of liquid crystal material laminated between two transparent conductive surfaces which are comprised of a pattern of individual capacitors to create the pixel array. The intensity of the illumination light transmitted through each pixel is controlled by the voltage across the capacitor, which is in turn controlled by an active transistor circuit connected to each pixel. This matrix of transistors (the active matrix) distinguish the AMLCD from the passive matrix liquid crystal devices which are strictly an array of conductors controlled by transistors external to the image area usually in the periphery of the matrix. The ability of each transistor to control the characteristics of just one pixel allows for the higher performance found in AMLCD displays in contrast to the passive arrays.
In AMLCD displays, the electronic signals which control the images are transmitted to the pixel from driver circuits along the edges of the rows and columns. Typically when a row of image data has been assembled in the form of an analog voltage signal at each column driver at the edge of the columns, an enabling signal to the corresponding row driver activates the transistor connected to each pixel in that row to pass the voltage onto the capacitor forming the pixel. This storage mechanism is similar to dynamic memory cells (DRAM) although the cells are typically addressed serially (rasterwise) rather than randomly as DRAM implies.
In most displays, the electronic activation of the image must be continuous or persistent through repetition. In the CRT and emissive displays in general, a constant or highly repetitive source of energy must be applied to the pixel to create photon emission. Phosphor decay times are typically a few milliseconds. Similarly, the capacitors in the AMLCD array lose their charge through leakage and accurate grayscale levels are lost. Furthermore, many liquid crystal materials exhibit ion migration and must be reversed in polarity with each refresh cycle. In general, displays with limited persistence must be refreshed frequently to avoid noticeable brightness variation known as flicker. On the other hand, displays with substantial persistence cannot display moving images without ghost images. Refreshing the image of most displays requires repeated transmission of the image data to the display, either from the broadcast source or from a storage device.
Not all electronic products which contain an electronic display have memory for storing the data which is to be displayed. For instance, a television must activate the CRT display in real time as the broadcast signal is received unless a VCR or similar storage medium is employed. In computers, data is transmitted and stored digitally. Moreover, in portable electronics devices, size and power constraints require the use of semiconductor memory which stores data only in digital format. In digital electronic products, it is typical that a display controller is incorporated to receive and store the bit mapped image to be displayed and then to transfer that data to the display in a series of image frames at a rate high enough to look smooth to the eye. The semiconductor memory storing the image bits is called the frame buffer, and the rate at which the data is refreshed on the display is called the frame rate.
It is an advantage in many applications to display large amounts of information requiring more and more resolution in the display. High resolution displays may contain hundreds of thousands of pixels. As an example, the Super VGA (SVGA) display resolution consists of 480,000 pixels. With a simple monochrome image and no grayscale, the frame storage is only equal to the approximately one-half megabit frame size. However, were the image to be full 24 bit depth color (i.e., 3 colors and 8 bits of grayscale per color), the frame storage would approach 12 megabits. At the frame rates which are common today for high performance displays, at least 60 frames per second and up to 85 frames per second, as many as one gigabits per second must be transferred from the frame buffer to the display. The state of semiconductor technology at present limits clock speeds to a level well below such transfer rates and parallel interfaces of 16 to 32 bit widths are typical in high performance displays.
It is a characteristic of analog displays that when the image data is stored in semiconductors, the digital information is converted to analog in a digital-to-analog converter (DAC) at the interface of the display. The digital representation of a pixel at the high standard of 8 bits of grayscale allows the creation of 256 separate shades per color (16 million distinct colors). In high performance displays, multiple DAC channels are required to provide the bandwidth of data transfer required.
As was noted above, most displays must be frequently rewritten to maintain an image. In the case of both CRT and AMLCD displays, data is being rewritten to one part of the display area while the rest of the array continues to display the prior image frame. This property is particular to monochrome displays and to color images are created from a composite of spatially separated sub-pixels. There is a clear advantage to writing and displaying data at the same time allowing each function to make maximum utilization of time allowed for each frame.
Once data corresponding to an image is transferred to a display via electronic signals, there is an advantage to the display device being able to maintain the image unless a portion of the image must be altered to provide motion to the image. The amount of data written to the display in each subsequent frame can be substantially reduced if the writing operation is organized to be random, such as to write data to any location in the array and only to those locations where the data is changing for reasons that the image is moving or for reasons the array is reused sequentially to create a composite image. To achieve this end however, pixel locations which are not being rewritten must be able to store data and continually display it.
There exists a class of displays, primarily MEMS electro-mechanical devices and certain polymeric dispersed cholesteric liquid crystals, which are inherently bistable due to nonlinearities of the electro-optic response curve. In these displays, image storage within the device itself can be indefinite although without color or grayscale. Further, such devices cannot inherently provide grayscale in response to analog signals. However, grayscale can be achieved through time division of the image frame into a multiplicity of on and off states which on average provide a shade proportional to the signal pattern.
Similarly, in an active matrix display a multiplicity of transistors may be provided in correspondence to each pixel such that a static memory (SRAM) cell (typically four or six transistors) can be utilized to activate each pixel. There are several advantages to static memory such as the on-state output voltage always being at the rail voltage, the low activation current, no voltage decay, and sufficient signal to noise to read from the memory cells any stored data. However, because a static memory cell is itself bistable, the pixel activation will provide no analog grayscale.
In general, displays with no analog response fall into two categories. Those displays with an extremely fast response in relation to the time divisions of the on-off cycles (as is typical of MEMS devices) can achieve grayscale through pulse width modulation. Those displays with a relatively slow response time in relation to on-off cycles (as is typical of liquid crystal devices) can achieve grayscale through a root mean square (RMS) voltage level based on the average time-voltage product. In both cases however, there is a disadvantage in comparison to analog grayscale methodologies, that being the loss of parallelism of the data transfer of the grayscale bits. Data transfer rates from frame buffers to a binary display device can be significantly higher than an analog display.
In the particular case of miniaturization of high resolution electronic displays, there is an advantage to reducing the size of the pixels which comprise the display. The need for such small devices has led to the development of a category of miniature displays often described as microdisplays with pixel sizes as small as 10 microns. In order to achieve this pixel resolution, active matrix devices have been developed utilizing silicon wafer fabrication of CMOS devices as opposed to thin-film transistors fabricated on a glass or quartz substrate. Single crystal silicon design rules are many times smaller than poly-silicon resulting in transistor sizes to easily fit microdisplay geometries. With the exception of techniques to separate the single crystal transistors from the silicon substrate utilizing lift-off technology, CMOS based active matrix displays are inherently opaque, and therefore must be reflective rather than transmissive like the poly-silicon devices. Even thin film transistor (TFT) based transmissive devices are however also opaque where transistors and interconnection lines, and optical efficiencies are very low for high resolution TFT displays.
The pixel sizes of microdisplays are too small to be directly viewed by the unaided eye, but can be magnified through projection optics to create a real image on a screen or wall or through a magnifier to create a virtual image in space. In practice, pixel sizes are limited today by magnifier and illumination considerations to geometries which are larger than single crystal silicon transistors, and in particular, useful pixels are even larger than multi-transistor SRAM cells.
The pixel sizes are also small relative to the size of color filters used in TFT AMLCD displays to create color triads for each pixel. There is a significant advantage to creating color through the sequential use of the entire array to create an image specific to each of the three prime color components. Through the utilization of separate light emitting diodes of each prime color to illuminate the display, the diodes can be turned rapidly on and off to correspond to the particular color component being displayed by the array at that moment. This method of color creation is called field sequential color wherein each color field is sequentially illuminated by the appropriate diode.
An important limitation of the field sequential color method is that data for the next color field cannot be written while the current color field is being illuminated. As a result, the time available to write to the display is limited and must be substantially less than the time allowed to illuminate each particular field""s color.
Because at least three different color images need to be displayed at a rate faster than can be resolved by the eye, the field sequential color method at least triples the frame rate required as compared to a monochrome display.
A need exists for a display system which can overcome the various above-described limitations of prior art display systems and be able to produce a high resolution field sequential color image which is not limited by the frame transfer rate limitations of existing display matrices. The display system should also be adaptable for use as a microdisplay.
A significant aspect of a compact electronic device is its portability. It is impractical and disadvantageous for a compact electronic display to rely on an external power source. Rather, compact electronic displays must rely on an internal battery for energy. It is important to the usefulness and reliability of the electronic display that the display be energy efficient so that the battery life of the display is optimized. A need thus exists for an energy efficient display for use in portable electronic devices.
These and other advantages are provided by the display system of the present invention.
A display matrix is provided for forming a composite image from a series of sub-images. In general, the display matrix includes a plurality of display elements, each display element including a pixel, and a display circuit electrically connected to the pixel. Each display circuit includes a plurality of memory cells, and a selector for outputting to the pixel data from one memory cell at a time.
According to one aspect of the display matrix of the present invention, a plurality of memory cells in the display circuit are continuously electrically connected to the selector of the display circuit at the same time. As a result, there is no need to address a particular memory cell to a particular selector. This may be accomplished, for example, by the display circuit including separate conductive elements for each memory cell in the display matrix which electrically connects a memory cell to the selector in the display circuit.
According to another aspect of the display matrix of the present invention, the display matrix is formed on a substrate having a plurality of regions where each region includes a memory circuit with a plurality of memory cells, and a selector electrically connected to the plurality of memory cells in the region. The substrate may be any material on which the display circuit may be attached or formed. In a preferred embodiment, the substrate is a semiconductor, such as silicon, on which the display circuits are formed by one or more of a variety of methods known in the art.
According to this aspect, the memory cells are physically interdispersed among the selectors within the plurality of display elements. In this regard, the memory associated with the display matrix is integrated into the display matrix as opposed to be external to the display matrix and the selectors.
According to the present invention, at least a portion of the display circuits of the display matrix include at least 2 memory cells per display circuit. In one embodiment, at least a portion of the display circuits of the display matrix include at least 3 memory cells per display circuit. The display matrix may optionally include 4-18 or more memory cells per display circuit, depending on a variety of factors which will be discussed herein.
In a preferred embodiment, the display matrix has sufficient memory such that data can be transferred to the display matrix for one sub-image while a different sub-image is displayed. The display matrix may also have sufficient memory to display two or more different sub-images without having to write to the memory cells between displaying the different sub-images. The plurality of memory cells in each circuit can represent different bits of a digital grayscale value. It is possible to vary the digital grayscale value significance of a particular memory cell image to image and field to field. The plurality of memory cells in each circuit can represent bits of different color fields.
In one embodiment, the display circuit can be operated in a field sequential color (FSC) mode without having to write to the memory cells between displaying different fields. This enables the display matrix to not need an external frame buffer. The display matrix may optionally be configured to be operated in a field sequential color (FSC) mode without having to write to the memory cells between displaying different fields.
Data preferably can be both written to and read from the memory cells. In one embodiment, data for forming a sub-image can be written randomly to the memory cells. In a particular variation, the memory cells are static random access memory (SRAM) cells.
In one embodiment, the display matrix is sized to form a microdisplay. According to this variation, the pixels in the plurality of display elements may form a source object having an area equal to or less than about 400 mm2 and preferably between about 20 mm2 and 100 mm2. The pixels of the display matrix preferably have an area less than about 0.01 mm2 and more preferably between 50 xcexcm2 and 500 xcexcm2.
The present invention also relates to a display system which includes a display matrix according to the present invention and peripheral control circuits for controlling read and write operations to the memory cells. The display system may also include an illumination source for illuminating the pixels. In one embodiment, the display includes a light emitting mechanism provided at each pixel. The display system may also include a light modulating mechanism, such as a liquid crystal material, provided at each pixel.
The display system may optionally further include logic for reading, inverting and rewriting data stored in the memory cells to provide a refresh cycle, a processor for reading, modifying, and rewriting data stored in the memory cells to compose a bit mapped image without the need of an external frame buffer, control circuits for reading, modifying, and rewriting data stored in the memory cells to provide a cursor function. The peripheral control circuits may also serve to read, move, and rewrite data stored in the memory cells to provide a scroll function.
The display system may also include an illumination source capable of providing a plurality of different color illumination to the pixels, the particular color illumination provided to the pixels being coordinated by the peripheral control circuits with the read and write operations to the memory cells. The illumination source preferably provides at least three different colors of illumination. Two different colors of illumination or more than three different colors of illumination may also be provided.
The display matrices and display systems of the present invention may be used in a display component of a variety of electronic devices. Examples of such devices include, but are not limited to portable computers, personal communicators, personal digital assistants, modems, pagers, video and camera viewfinders, mobile phones, and television monitors. In one particular embodiment, the display matrices and display systems of the present invention are used in combination with one or more magnification optics to form a virtual image display system.
The present invention also relates to methods of using the display matrices and display systems of the present invention to produce composite images as described herein.